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FHP3194 4:1 High-Speed Multiplexer
October 2006
FHP3194 4:1 High-Speed Multiplexer
Features
0.1dB gain flatness to 90MHz @ 2Vpp 0.02%/0.05 differential gain/phase error 500MHz large signal -3dB bandwidth at G = 2 2200V/s slew rate 75mA output current (easily drives two video loads) 70dB channel-to-channel isolation 13mA supply current 3.5mA supply current in disable mode 2.5mA supply current in shutdown mode Fully specified at 5V supplies Lead-free SOIC-14 and TSSOP-14 packages
Description
The FHP3194 is a 4:1 analog multiplexer designed for high-speed video applications. The output amplifier is a high-speed current feedback amplifier that offers stellar large signal performance of 500MHz -3dB bandwidth and 90MHz 0.1dB bandwidth. The gain of the output amplifier is selectable through two external resistors (Rf and Rg), allowing further design flexibility. The 2Vpp bandwidth performance and 2200V/s slew rate exceed the requirements of high-definition television (HDTV) and other multimedia applications. The output amplifier also provides ample output current to drive multiple video loads. Two address bits (A0 and A1) are used to select one of the four inputs. The FHP3194 offers better than 70dB channel isolation. The FHP3194 offers both shutdown and disable capability. During shutdown, the FHP3194 consumes only 2.5mA of supply current. During disable mode, only the output amplifier is disabled, reducing output glitches and allowing for multiplexer expansion.
FHP3194 SOIC/TSSOP
IN1 GND IN2 GND IN3 -Vs IN4
1
2 3 4 14 13 12 11
Applications
Video switchers and routers Multiple input HDTV switching Picture-in-picture video switch Multi-channel ADC driver
Functional Block Diagram
+Vs OUT -VIN SD EN A1 A0
LOGIC
5 6 7
10 9 8
Ordering Information
Part Number
FHP3194IM14X FHP3194IMTC14X
Moisture sensitivity level for all parts is MSL-1.
Package
SOIC-14 TSSOP-14
Pb-Free
Yes Yes
Operating Temperature Range
-40C to +85C -40C to +85C
Packaging Method
Reel Reel
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Pin Configuration
FHP3194 SOIC/TSSOP
IN1 GND IN2 GND IN3 -Vs IN4
1
2 3 4 14 13 12 11
+Vs OU T -VIN SD EN A1 A0
LOGIC
5 6 7
10 9 8
Pin Assignments
Pin#
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Pin Name
IN1 GND IN2 GND IN3 -Vs IN4 A0 A1 EN SD -VIN OUT +Vs Input, channel 1 Must be connected to ground Input, channel 2 Must be connected to ground Input, channel 3 Negative supply Input, channel 4 Logic input A0 Logic input A1
Description
Enable pin, "1" = Disable, "0" = Enable; Enabled when left floating Shutdown pin, "1" = Shutdown, "0" = Active; Active when left floating Inverting Input of output amplifier Output Positive supply
Truth Table
A0
1 0 1 0 X X
A1
1 1 0 0 X X
EN
0 0 0 0 1 X
SD
0 0 0 0 0 1
OUT
CH4 CH3 CH2 CH1 Disable Shutdown
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Absolute Maximum Ratings
The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table defines the conditions for actual device operation.
Parameter
Supply Voltage Input Voltage Range
Min.
0 -Vs -0.5V
Max.
12.6 +Vs +0.5V
Unit
V V
Reliability Information
Parameter
Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 14-Lead TSSOP1 14-Lead SOIC
1
Min.
-65
Typ.
Max.
150 150 300
Unit
C C C C/W C/W
113 125
Notes: 1. Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product
Human Body Model (HBM) Charged Device Model (CDM)
SOIC-14
3.5kV 2kV
TSSOP-14
3kV 2kV
Recommended Operating Conditions
Parameter
Operating Temperature Range Supply Voltage Range
Min.
-40 5
Typ.
Max.
+85 12
Unit
C V
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FHP3194 4:1 High-Speed Multiplexer
Electrical Characteristics at 5V
TA = 25C, Vs = 5V, Rf = 475, RL =150, G = 2; unless otherwise noted. Symbol
UGBW BWSS BWLS
Parameter
-3dB Bandwidth -3dB Bandwidth Full Power Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness
Conditions
G = +1, Rf = 1.5k VOUT = 0.2Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp VOUT = 2V step; (10% to 90%) VOUT = 2V step VOUT = 0.2V step 4V step 2Vpp, 5MHz, worst channel 2Vpp, 5MHz, worst channel 2Vpp, 5MHz, worst channel NTSC (3.58MHz), DC-coupled NTSC (3.58MHz), DC-coupled > 1MHz > 1MHz > 1MHz Channel-to-channel 5MHz/ 30MHz, worst CH combination
Min.
Typ.
1200 800 500 200 90 1 15 4 2200 -68 -89 -67 0.02 0.05 7 22 16 -68/-53
Max.
Units
MHz MHz MHz MHz MHz ns ns % V/s dBc dBc dB % nV/Hz pA/Hz pA/Hz dB
Frequency Domain Response
Time Domain Response tR, tF tS OS SR HD2 HD3 THD DG DP en in+ inXTALK Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Input Voltage Noise Input Current Noise (+) Input Current Noise (-) All Hostile Crosstalk
Distortion / Noise Response
DC Performance VIO dVIO VIOM Ibn dIbn Ibi dIbni GM PSRR IS IEN ISD Input Offset Voltage(1) Average Drift Input Offset Voltage Matching(1) Input Bias Current Non-inverting(1) Average Drift Input Bias Current Inverting(1) Average Drift Gain Matching Power Supply Rejection Ratio Supply Current(1) Disable Supply Current(1) Shutdown Supply Current(1) Switching Time 50% Logic to: TS 90% output (10% output settling)(2) 99% output (1% output settling)(2) VSW
Notes: 1. 100% tested at 25C
(1)
-9 Channel-to-channel Pins 1,3,5,7 Pin 12 Channel-to-channel DC Disable mode Shutdown mode Channel-to-channel IN1, IN3 = +0.5V; IN2, IN4 = -0.5V IN1, IN3 = +0.5V; IN2, IN4 = -0.5V All inputs grounded 54 -5 -30 -35
1 8.5 0.8 4 25 13 20 0.02 65 13 3.5 2.5
+9 5 30 35
mV V/C V/C mV A A nA/C /C A A nA/C /C % dB
18 6 5
mA mA mA
Switching Characteristics 25 40 375 ns ns mVpp
Channel Switch. Trans. (Glitch)
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Electrical Characteristics at 5V (Continued)
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted. Symbol
Digital Inputs VIH VIL IIH IIL Logic-High Threshold Logic-Low Threshold Logic Pin Input Current High Logic Pin Input Current Low A0, A1, EN, and SD pins A0, A1, EN, and SD pins A0, A1, EN, and SD pins Logic input =0V A0, A1, EN, and SD pins Logic input =0V 5MHz/30MHz, worst comb. 5MHz/30MHz, worst comb. 5MHz/30MHz, worst comb. VIN = 500mV VIN = 500mV VIN = 500mV VIN = 500mV
(3)
Parameter
Conditions
Min.
2.0
Typ.
Max.
Unit
V
0.8 22 0
V A A
Disable Characteristics ENISO SDISO CHISO ENTON ENTOFF SDTON SDTOFF RIN CIN CMIR CMRR Disable Isolation Shutdown Isolation CH-to-CH Isolation Turn-on time (Disable to ON) Turn-off time (ON to Disable) Turn-on time (Shutdown to ON) Turn-off time (ON to Shutdown) Input Resistance Input Capacitance Input Common Mode V Range Common Mode Rejection Ratio(1) DC RL = 2kW RL = 150W VIN = 0 Enabled Disabled
(1)
-76/-61 -76/-61 -70/-55 30 65 32 66 188 1.7 3.1 50 60 4.0 3.2 3.8 75 100 0.1 1 3.7
dB dB dB ns ns ns ns kW pF V dB V V mA mA k pF
Input Characteristics
Output Characteristics VOUT IOUT ISC ROUT COUT
Notes: 1. 100% tested at 25C 2. SD and EN pins are grounded. IN1 and IN3 = +0.5V, IN2 and IN4 = -0.5V, see truth table to properly set A0 and A1 based on the channels driven. Switching time is the transition time from 50% of A0 or A1 input value (+2.5V) to the time at which the switched channel is at 90% (or 99%) of its final value. 3. Driving one channel and looking at worst case value from remaining channels.
Output Voltage Swing Linear Output Current Short-Circuit Output Current Output Resistance Output Capacitance
VOUT = GND, RL = 0
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FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted.
6 0.1 0
VS = 5V G=1 RF = 1.5k G=2 RF = 475 G=5 RF = 300 G = 10 RF = 150 Vo = 0.2Vpp
Normalized Gain (dB)
Normalized Gain (dB)
3 0 -3 -6 -9 -12 0.1
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1
Vo = 2Vpp
1
10
100
1000
10000
0.1
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure 1. Non-Inverting Freq. Response
1600 1400 1200
Figure . Gain Flatness vs. Frequency
0.1 0
Normalized Gain (dB)
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1
Vo = 2Vpp
Rf Value
1000 800 600 400 200 0 1 2 3 4 5 6 7 8 9 10
0.1
1
10
100
1000
Gain (V/V)
Frequency (MHz)
Figure 3. Recommended Rf vs. Gain
3 2 1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 0.1
Figure 4. Gain Flatness vs. Frequency
3
Normalized Gain (dB)
Normalized Gain (dB)
0 -3 -6 -9
VOUT = 4Vpp VOUT = 2Vpp VOUT = 1Vpp
CL = 20pF Rs = 26 CL = 56pF Rs = 13 CL = 100pF Rs = 16 Vo = 0.2Vpp
-12 -15 -18
1
10
100
1000
0.1
1
10
100
1000
10000
Frequency (MHz)
Frequency (MHz)
Figure 5. Frequency Response vs. CL
Figure . Frequency Response vs. VOUT
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted.
70 60 60 50
Worst Channel
40 30 20 10 10k 100k 1M 10M 100M 1G
CMRR (dB)
PSRR (dB)
50
40 30 20 10 0 10k 100k 1M 10M 100M 1G
Frequency (Hz)
Frequency (Hz)
Figure . PSRR vs. Frequency
106 0 -45 -50
Figure 8. CMRR vs. Frequency
RL = 150 Vo = 2Vpp
Transimpedance ()
105
Transimpedance
Phase
-55
HD2 (dBc)
100
Worst CH
Phase (deg)
-60 -65 -70 -75 -80
Best CH
104 -200 10
3
10
2
-300 10k 100k 1M 10M 100M 1G
-85 1 10 30
Frequency (Hz)
Frequency (MHz)
Figure 9. Open Loop Transimpedance Gain and Phase
-60 -65 -70
RL = 150 Vo = 2Vpp
All Channels
Figure 10. HD vs. Frequency
-40 -45 -50 -55 -60 -65 -70 -75 -80 -85 -90
Best CH 50MHz Best CH 5MHz Best CH 30MHz Worst CH 5MHz Worst CH 30MHz Worst CH 50MHz
HD2 (dBc)
-75 -80 -85 -90 -95 1 10 30
HD2 (dBc)
1
1.5
2
2.5
3
3.5
4
4.5
5
Frequency (MHz)
VOUT (Vpp)
Figure 11. HD3 vs. Frequency
Figure 1. HD vs. VOUT
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted.
-55 -60 -65
All Channels 50MHz
0.008 0.004
AC Coupled, 220F
0.008 0.004 0
Gain Phase
Differential Phase (deg)
Differential Gain (%)
0 -0.004 -0.008 -0.012 -0.016 -0.020 -0.024 -0.028
HD3 (dBc)
-70 -75 -80 -85 -90 -95 1 1.5 2 2.5 3 3.5 4
-0.004 -0.008 -0.012 -0.016 -0.020 -0.024 -0.028
30MHz
5MHz
4.5
5
-0.7
-0.5
-0.3
-0.1
0.1
0.3
0.5
0.7
VOUT (Vpp)
Input Amplitude (V)
Figure 13. HD3 vs. VOUT
0.06 0.06
DC Coupled
Figure 14. Differential Gain and Phase
5 4 3 2
RL = 150 RL = 10k
Differential Gain (%)
0.05 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05
0.05 0.04
Phase Gain
Differential Phase (deg)
0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05
VOUT (V)
1 0 -1 -2 -3 -4 -5 -5 -4 -3 -2
RL = 1k RL = 100 RL = 75
-0.7
-0.5
-0.3
-0.1
0.1
0.3
0.5
0.7
-1
0
1
2
3
4
5
Input Amplitude (V)
VIN (V)
Figure 15. Differential Gain and Phase
Figure 1. Output Swing vs. RL
1.5
2.5
Vs = 5V
2.0
1.0
Output (V)
1.0 0.5 0 -0.5 0 10 20 30 40 50 60 70 80 90 100
Output (V)
1.5
0.5 0 -0.5 -1.0 -1.5 0 10 20 30 40 50 60 70 80 90 100
Time (ns)
Time (ns)
Figure 1. Pulse Response
Figure 18. Pulse Response
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FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted.
6 4 14 12 10 2.0 1.5 1.0
A0 Input (V)
Output (V)
2 0 -2 -4 -6 0 20 40 60 80 100 120 140
Output (V)
8 6 4 2 0 -2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Output A0 Input
0.5 0 -0.5 -1.0 -1.5 -2.0
Time (ns)
Time (ns)
Figure 19. Pulse Response
6 5 4
A0 Input
Figure 0. Channel Switching Time
0.6 0.5 0.4 6 5 4
A1 Input
0.6 0.5 0.4 0.3 0.2
Output
A0 Input (V)
A1 Input (V)
3 2 1 0 -1 -2 -3 0 100 200 300 400 500 600 700 800 900 1000
Output
0.3 0.2 0.1 0
3 2 1 0 -1 -2 -3 0 100 200 300 400 500 600 700 800 900 1000
-0.1 -0.2 -0.3
Output (V)
Output (V)
0.1 0
-0.1 -0.2 -0.3
Time (ns)
Time (ns)
Figure 1. A0 Switching Glitch
Figure . A1 Switching Glitch
16 14 12
1.6 1.4 1.2
8 7 6 5 4 3 2 1 0 -1 -2 0 100 200 300 400 500 600 700 800 900 1000
Output SD Input
0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3
SD Input (V)
SD Input (V)
10 8 6 4 2 0 -2 0 100 200 300 400 500 600 700
Output SD Input
1.0 0.8 0.6 0.4 0.2 0
-0.2
Output (V)
Output (V)
Time (ns)
Time (ns)
Figure 3. Shutdown Switching Time
Figure 4. Shutdown Switching Glitch
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FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25C, Vs = 5V, Rf = 475, RL =150, and G = 2 unless otherwise noted.
16 14 12 1.6 1.4 1.2 6 5 4
EN Input
0.6 0.5 0.4 0.3 0.2 0.1
Output
EN Input (V)
EN Input (V)
10 8 6 4 2 0 -2 0 100 200 300 400 500 600 700
Output EN Input
1.0 0.8 0.6 0.4 0.2 0
3 2 1 0 -1 -2 -3 0 100 200 300 400 500 600 700 800 900 1000
-0.2
Output (V)
Output (V)
0 -0.1 -0.2 -0.3
Time (ns)
Time (ns)
Figure 5. Enable Switching Time
-40 -45 -50 -20 -30
Figure . Enable Switching Glitch
Selected input to output
Unselected input to output Worst condition shown
Off Isolation (dB)
-60 -65 -70 -75 -80 -85 -90 1
Crosstalk (dB)
100
-55
SD EN
-40 -50 -60 -70 -80 -90
10
1
10
100
1000
Frequency (MHz)
Frequency (MHz)
Figure . Off Isolation vs. Frequency
100
Figure 8. Crosstalk vs. Frequency
104 103 102
Disabled
Input Voltage Noise (nV/Hz)
90 80 70 60 50 40 30 20 10 0 0.001
IZi ()
101 100 10-1 10-2
Enabled
0.01
0.1
1
10
100
10k
100k
1M
10M
100M
1G
Frequency (MHz)
Frequency (Hz)
Figure 9. Input Voltage Noise
Figure 30. Closed-Loop Output Impedance
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FHP3194 4:1 High-Speed Multiplexer
Application Information
Circuit Diagrams
+5V
6.8F
6dB (G = 2) Configuration
IN1 75
1
2
14 13 12 11
0.1F 75
IN2 75
OUT RF = 475
3 4
LOGIC
SD RT* A1 A0 RT* RT* EN RT*
RG = 475
IN3 75
6.8F 0.1F
5 6 7
10 9 8
-5V
IN4 75
*Termination resistors (RT = 50) are optional.
Figure 31. Typical Application Circuit dB Gain (G = )
+5V
6.8F
0dB (G = 1) Configuration
IN1 75
1
2
14 13
0.1F 75
OUT
IN2 75
RF = 1.5k
3 4 12 11
LOGIC
SD RT* A1 A0 RT* RT* EN RT*
IN3 75
6.8F 0.1F
5 6 7
10 9 8
-5V
IN4 75
*Termination resistors (RT = 50) are optional.
Figure 3. Typical Application Circuit 0dB Gain (G = 1)
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FHP3194 4:1 High-Speed Multiplexer
Application Information
General Description
The FHP3194 4:1 multiplexer has four analog switches that drive the positive input of a high-speed current feedback amplifier. It is designed so that only one channel is on at a time. Tie unused inputs to ground. Figures 31 and 32 show typical application circuits for the FHP3194 in 6dB (G = 2) and 0dB (G = 1) configurations.
At a single 5V supply, the CMIR becomes 1.9V to 3.1V. The same theory can be applied to the VOUT range.
Driving Video
The FHP3194 is designed to drive high-speed video. 90MHz 0.1dB bandwidth at 2Vpp output, 0.02/0.05% differential gain/phase, and 75mA output current make the FHP3194 suitable for driving standard-definition, highdefinition, or PC graphics video.
Rf and Rg Selection
The output of the FHP3194 is a current feedback amplifier. The gain of this amplifier is set by two external resistors: Rf and Rg. The frequency response and closed-loop bandwidth of the current feedback amplifier are highly dependant on the value of Rf. For a gain of two, use Rf = 475. For other gains, refer to the Rf vs. GAIN plot in Figure 3. In general, a lower Rf peaks the frequency response and increases bandwidth, while a higher Rf will decrease bandwidth and roll off the frequency response. A feedback resistor is required for unity gain (G = 1); the recommended value is 1.5k.
Driving Video with a Single 5V Supply
The FHP3194 drives video signals from a single 5V supply at G = 1 only. At higher gains, the CMIR and Vo range is not suitable for passing video without clipping the signal.
Driving Capacitive Loads
The FREQUENCY RESPONSE VS. CL plot in Figure 5, illustrates the response of the FHP3194. A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 33, improves stability and settling performance. Rs values in the FREQUENCY RESPONSE VS. CL plot were chosen to achieve maximum bandwidth with less than 1dB of peaking. For maximum flatness, use a larger Rs. + Rg Rf Rs CL RL
A0, A1
The A0 and A1 logic pins are TTL/CMOS compatible and are used to select which of the four inputs connects to the output. Refer to the TRUTH TABLE on page 2 for more information. Channel 1 is selected if both pins are left floating.
EN, SD
The FHP3194 offers both shutdown and disable capability. The EN (enable) pin is active low. During disable mode (EN = 1), only the output amplifier is disabled, reducing output glitches and allowing for multiplexer expansion. The FHP3194 is enabled when the EN pin is left floating or grounded. The SD (shutdown) pin is active high. During shutdown (SD = 1), the FHP3194 consumes only 2.5mA of supply current. The FHP3194 is enabled when the SD pin is left floating or grounded.
Figure 33. Typical Topology for Driving Capacitive Loads Power Dissipation
The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150C for an extended time, device failure may occur. The FHP3194 is short-circuit protected; however, this may not guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. RMS power dissipation can be calculated using the following equation: Power Dissipation = Is * (Vs+ - Vs-) + (Vs+ - Vo(RMS)) * IOUT(RMS) where Is is the supply current, Vs+ is the positive supply pin voltage, Vs- is the negative supply pin voltage, Vo(RMS) is the RMS output voltage, and IOUT(RMS) is the RMS output current delivered to the load. Follow the maximum power derating curves shown in Figure 34 to ensure proper operation.
Supply Voltage
The FHP3194 operates from a single supply of 5V to 12V or dual supplies of 2.5V to 6.0V. For low supply voltage operation, ensure that the common mode input voltage range (CMIR) or output voltage range (Vo) are not exceeded. Exceeding the CMIR or Vo range puts the FHP3194 into an overdrive condition. For example, the typical CMIR for the FHP3194 is 3.1V at 5V supply, which means 1.9V of headroom is required from each supply.
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FHP3194 4:1 High-Speed Multiplexer
Maximum Power Dissipation (W)
1.8 1.6 1.4
SOIC-14
4.5 3.5 2.5
Output Pos_AV+5
Amplitude (V)
1.2 1.0 0.8 0.6 0.4 0.2 0 -40 -20 0 20 40 60 80
TSSOP-14
1.5 0.5 -0.5 -1.5 -2.5 -3.5 -4.5 0
Output Neg_AV+5 Input Neg_1Vpp Input Pos_1Vpp
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Ambient Temperature (C)
Time (s)
Figure 34. Maximum Power Derating Overdrive Recovery
For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The FHP3194 typically recovers in less than 75ns from an overdrive condition. Figure 35 shows the FHP3194 in an overdriven condition.
Figure 35. Overdrive Recovery
Layout Considerations
General layout and supply bypassing play major roles in high-frequency performance. Fairchild has evaluation boards to use as a guide for high-frequency layout and as aid in device testing and characterization. Follow the guidelines below as a basis for high-frequency layout: Include 6.8F and 0.1F ceramic capacitors. Place the 6.8F capacitor within 0.75 inches of the power pin. Place the 0.1F capacitor within 0.1 inches of the power pin. Remove the ground plane under and around the part, especially near the input and output pins and under Rf and Rg, to reduce parasitic capacitance. Minimize all trace lengths to reduce series inductances. For current feedback amplifiers, stray capacitance from the inverting input (pin 12) to ground or to the output (pin 13) increases peaking in the AC response. For optimum performance, place Rf and Rg as close to the FHP3194 as possible. Small-size surface-mount resistors are recommended.
Avoid the use of vias near the device; vias add unwanted inductance. If traces of greater than one inch are required, use stripline or microstrip techniques designed with characteristic impedances of 50 or 75 that are properly terminated with impedance-matching elements at each end. Refer to the evaluation board layouts for more information.
Evaluation Board Information
The following evaluation boards are available to aid in the testing and layout of these devices:
Evaluation Board
KEB022 KEB025
Products
FHP3194IM14X FHP3194IMTC14X
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FHP3194 4:1 High-Speed Multiplexer
Figure 3. KEB0 Top-Side
Figure 38. KEB05 Top-Side
Figure 3. KEB0 Bottom-Side
Figure 39. KEB05 Bottom-Side
VCC
R1-1 75 C1 6.8F + -
IN1
C3 0.1F + -
OUT
ROUT 75
R1-2 75
1 2 3
FHP3194
NI1 GND1 NI2 GND2 NI3 VEE NI4 VS+ OUT VINV SD EN A1 A0
14 13 12 11 10 9 8
RF 475
RG 475
IN2 IN3
4 5 6 7
SD
R5 50
R1-3 75
C2 6.8F +
+
C4 0.1F
R1-4 75 R3 50 R2 50
A1
R4 50
EN
VEE PWR
IN4 A0
*Choose R1-1, R1-2, R1-3, R1-4, and ROUT for proper impedance matching. R2, R3, R4, and R5 are optional.
Figure 40. FHP3194 Schematic Diagram
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
14
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Mechanical Dimensions
Figure 41. SOIC-14 Package
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
15
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Mechanical Dimensions
Figure 4. TSSOP-14 Package
(c) 2006 Fairchild Semiconductor Corporation FHP3194 Rev. 1.0.1
1
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Rev. I20
www.fairchildsemi.com
(c)2006 Fairchild Semiconductor Corporation

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